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Partname:CY7C1370DV25
Description: 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL??? Architecture
Manufacturer:Cypress Semiconductor
Datasheet:PDF (421K).
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The CY7C1370DV25 and CY7C1372DV25 are 2.5V, 512K x 36 and 1 Mbit x 18 Synchronous pipelined burst SRAMs with No Bus LatencyTM (NoBL) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1370DV25 and CY7C1372DV25 are equipped with the advanced (NoBL) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle. This feature dramatically improves the throughput of data in systems that require frequent Write/Read transitions. The CY7C1370DV25 and CY7C1372DV25 are pin-compatible and functionally equivalent to ZBT devices.

Click here to download CY7C1370DV25 Datasheet
Click here to download CY7C1370DV25 Datasheet
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