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Partname:CY7C1354CV25-167AXI
Description: 9-Mbit ( 256K x 36/512K x 18 ) Pipelined SRAM with NoBL-TM Architecture
Manufacturer:Cypress Semiconductor
Datasheet:PDF (346K).
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The CY7C1354CV25 and CY7C1356CV25 are 2.5V, 256K x 36 and 512K x 18 Synchronous pipelined burst SRAMs with No Bus LatencyTM (NoBLTM) logic, respectively. They are designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1354CV25 and CY7C1356CV25 are equipped with the advanced (NoBL) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle. This feature dramatically improves the throughput of data in systems that require frequent Write/Read transitions. The CY7C1354CV25 and CY7C1356CV25 are pin-compatible with and functionally equivalent to ZBT devices.

Click here to download CY7C1354CV25-167AXI Datasheet
Click here to download CY7C1354CV25-167AXI Datasheet
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