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Partname:CY7C1329-133AC
Description:64K x 32 Synchronous-Pipelined Cache RAM
Manufacturer:Cypress Semiconductor
Datasheet:PDF (276K).
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The CY7C1329 supports either the interleaved burst sequence used by the Intel Pentium processor or a linear burst sequence used by processors such as the PowerPC. The burst sequence is selected through the MODE pin. Accesses can be initiated by asserting either the Processor Address Strobe (ADSP) or the Controller Address Strobe (ADSC) at clock rise. Address advancement through the burst sequence is controlled by the ADV input. A 2-bit on-chip wraparound burst counter captures the first address in a burst sequence and automatically increments the address for the rest of the burst access.

Click here to download CY7C1329-133AC Datasheet
Click here to download CY7C1329-133AC Datasheet
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