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Partname: | CY7C1297H-133AXC |
Description: | 1-Mbit (64K x 18) Flow-Through Sync SRAM |
Manufacturer: | Cypress Semiconductor |
Datasheet: | PDF (354K). Click here to download *) |
The CY7C1297H is a 64K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and increments the address automatically for the rest of the burst access. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE1), depth-expansion Chip Enables (CE2 and CE ), Burst 3 |
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Click here to download CY7C1297H-133AXC Datasheet*) |
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