The CY7B991V Low voltage Programmable Skew Clock Buffer (LVPSCB) offers user selectable control over system clock functions. These multiple output clock drivers provide the system integrator with functions necessary to optimize the timing of high-performance computer systems. Each of the eight individual drivers, arranged in four pairs of user controllable outputs can drive terminated transmission lines with impedances as low as 50. This delivers minimal and specified output skews and full swing logic levels (LVTTL). Each output is hardwired to one of nine delay or function configurations. Delay increments of 0.7 to 1.5 ns are determined by the operating frequency with outputs able to skew up to 6 time units from their nominal "zero" skew position. The completely integrated PLL allows external load and transmission line delay effects to be canceled. When this "zero delay" capability of the LVPSCB is combined with the selectable output skew functions, the user can create output-to-output delays of up to 12 time units.