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Partname:CY2SSTV16859ZIT
Description: 13-Bit to 26-Bit Registered Buffer PC2700-/PC3200-Compliant
Manufacturer:Cypress Semiconductor
Datasheet:PDF (228K).
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The CY2SSTV16859 operates from a differential clock (CLK and CLK#) of frequency up to 280 MHz. Data are registered at crossing of CLK going high and CLK# going low. When RESET# is low, the differential input receivers are disabled, and undriven (floating) data and clock inputs are allowed. The LVCMOS RESET# input must always be held at a valid logic high or low level. To ensure defined outputs from the register before a stable clock has been supplied, RESET# must be held in the low state during power up.

Click here to download CY2SSTV16859ZIT Datasheet
Click here to download CY2SSTV16859ZIT Datasheet
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