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Partname: | CY2308SI-4T |
Description: | 3.3V Zero Delay Buffer |
Manufacturer: | Cypress Semiconductor |
Datasheet: | PDF (367K). Click here to download *) |
The CY2308 PLL enters a power down state when there are no rising edges on the REF input. In this mode, all outputs are three-stated and the PLL is turned off resulting in less than 50 A of current draw. The PLL shuts down in two additional cases as shown in the table "Select Input Decoding" on page 2. |
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![Click here to download CY2308SI-4T Datasheet](../../../pndecoder/datasheets/CYPR/img/001992.gif) Click here to download CY2308SI-4T Datasheet*) |
![](http://www.chipdocs.com/common/img/1x10t.gif) |
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