The CN8330 provides framing recovery for M13, C-bit parity, Syntran, and G.751 E3 formatted signals. A First In First Out (FIFO) buffer in the receive path can be enabled to reduce jitter on the incoming data. Transmit and receive data is available to the host in either serial or parallel byte and nibble formats. Access is provided to the terminal data link and the Far End Alarm/Control (FEAC) channel, as specified in T1.107a-1989. Counters are included for frame-bit errors, Line Code Violations (LCVs), parity errors, and Far End Block Errors (FEBEs). Two operational modes are available: microprocessor and stand-alone monitor control modes. The microprocessor control mode monitors all status conditions and provides configuration control. The stand-alone monitor mode allows the CN8330 to operate as a monitor providing status and alarm information on external pins.