The CS2000-OTP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2000-OTP is based on a hybrid analogdigital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL. This architecture allows for both frequency synthesis/clock generation from a stable reference clock as well as generation of a low-jitter clock relative to an external noisy synchronization clock with frequencies as low as 50 Hz. The CS2000OTP has many configuration options which are set once prior to runtime. At runtime there are three hardware configuration pins available for mode and feature selection.