The AFE1230 receives a 16-bit data word plus an 8-bit control byte via the serial interface to facilitate the D/A conversion and control functions. The subsequent analog signal is sent to the on-chip line driver that provides 14.5dBm power into a 135 line for G.SHDSL operation. In addition, the on-chip line driver can be used as an output buffer with an external line driver, such as the OPA2677, to generate over 17dBm power into a 135 line for HDSL2 operation. With an appropriate DSP, the transmitted Power Spectral Density (PSD) complies with either the G.SHDSL standard or with the HDSL2 standard (via an OPA2677 used as an external driver). In the receive path, the input amplifier sums the signals from the line and hybrid path to perform first-order analog echo cancellation. The resultant signal is then digitized by the rest of the receive section into a 16-bit digital word that is sent to the external DSP.