The ADS1610 topology provides key system-level design advantages with respect to anti-alias filtering and clock jitter. The design of the user's front-end anti-alias filter is simplified since the on-chip digital filter greatly attenuates out-of-band signals. The ADS1610s filter has a brick wall response with a very flat passband (0.0002dB of ripple) followed immediately by a very wide stop band (5MHz to 55MHz). Clock jitter becomes especially critical when digitizing high frequency, large-amplitude signals. The ADS1610 significantly reduces clock jitter sensitivity by an effective averaging of clock jitter as a result of oversampling the input signal. Output data is supplied over a parallel interface and easily connects to TMS320 digital signal processors (DSPs). The power dissipation can be adjusted with an external resistor, allowing for reduction at lower operating speeds.