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Partname: | AZ100EL31TR1 |
Description: | 4.75 V-5.5 V, ECL/PECL D flip-flop with set and reset |
Manufacturer: | |
Package: | TSSOP |
Pins: | 8 |
Oper. temp.: | -40 to 85 |
Datasheet: | PDF (140K). Click here to download *) |
The AZ10/100EL31 is a master-slave D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ideally suited for those applications that require the ultimate in AC performance. Both set and reset inputs are asynchronous, level triggered signals. Data enters the master section of the flipflop when the clock is LOW. When the clock transitions from LOW to HIGH, the data in the master section transfers into the slave section and through to the outputs. NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established. TRUTH TABLE |
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Click here to download AZ100EL31TR1 Datasheet*) |
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