The Austin Semiconductor, Inc. Synchronous Burst SRAM family employs high-speed, low power CMOS designs that are fabricated using an advanced CMOS process. ASI's 4Mb Synchronous Burst SRAMs integrate a 256K x 18, SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input (CLK). The synchronous inputs include all addresses, all data inputs, active LOW chip enable (CE), two additional chip enables for easy depth expansion (CE2, AS5SS256K18