The UG2 series of ULCs is well suited for conversion of medium- to-large sized CPLDs and FPGAs. Devices are implemented in high-performance CMOS technology with 0.5-m (drawn) channel lengths, and are capable of supporting flip-flop toggle rates of 625 MHz at 5V and 360 MHz at 3.3V, operating clock frequencies up to 150 MHz and input to output delays as fast as 5 ns, 200 ps at 5V.