The AT8xC5103 contains a standard C51 CPU core with 12 Kbytes ROM/OTP program memory, 256 bytes of internal RAM, 256 bytes of extended internal RAM, a 5sources 4-level interrupt system, two timer/counters and a SPI serial bus controller. The AT8xC5103 is also dedicated for analog interfacing applications. For this, it has a five channels Programmable Counter Array. In addition, the AT8xC5103 implements the X2 speed improvement mechanism. The X2 feature allows to keep the same CPU power at a divided by two oscillator frequency.