The AT78C5081 is a stand-alone Serial ATA physical layer that is designed based on SATA Standard revision 1.0a. The parallel interface to the link layer is based on a 10bit interface in both rising and falling edges of the clock. The device also accepts two 10-bit 8b/10b encoded transmit characters in parallel and latches them on the rising edge of TBC. The serialized data is transmitted onto the TXP/TXN differential outputs at a baud rate twenty times that of the TBC frequency. The device also samples serial data received on the RXP/RXN differential inputs, recovers the clock and data, deserializes it into one or two 10-bit receive characters in parallel. The recovered clock is sent out at one twentieth of the incoming data rate. The receiver includes the squelch detector, out of band (OOB) signal detector, and is capable of detecting "Comma" characters. This transceiver contains on-chip PLLs circuitry for synthesis of the transmitting clock and extraction of the clock from the received serial stream. The transmit PLL is also responsible for link layer reference clock generation (ASIC_CK). The circuit requires only one external component, the reference resistor. An additional onchip serial port interface is employed to adjust the performance of certain blocks or to