The APW6021A provides the power control and protection for four output voltages in high-performance, graphics intensive microprocessor and computer applications. The IC integrates voltage-mode PWM controller and three linear controllers, as well as the monitoring and protection functions into a 28-pin SOIC package. The synchronous-rectified buck converter includes an Intel-compatible , TTL 5-input digital-toanalog converter (DAC)that adjusts the core PWM output voltage from 1.3VDC to 2.05VDC in 0.05V steps and from 2.1VDC to 3.5VDC in 0.1V increments. the precision reference and voltage-mode control provide 1% static regulation. A TTL-compatible signal applied to the SELECT pin dictates which method of control is used for the AGP bus power : a low state results in linear control of the AGP bus to 1.5V , while a high state transitions the output through a linearly controlled softstart to 3.3V , followed by full enhancement of the external MOSFET to pass the input voltage. The other two linear regulators provide fixed output voltages of 1.5V GTL bus power and 1.8V power for the North/South Bridge core and/or cache memory. These levels are user-adjustable by means of an external resistor divider and pulling the FIX pin low. All linear controllers can employ either N-Channel MOSFETs or bipolar NPNs for the pass transistor.