The CMOS inputs cause minimal circuit loading and are compatible with standard CMOS, PMOS, and NMOS circuits. TTL or DTL circuits may require the use of appropriate pull up resistors. When reading back, each data input will sink 8 mA (if its corresponding latch is low) or source 400 A (if its corresponding latch is high). The read back feature is for error checking. It allows the system to verify that data has been received and latched.