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Description:Dual Rate Limiting Amplifier and Clock and Data Recovery IC
Manufacturer:Analog Devices
Datasheet:PDF (471K).
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The ADN2811 provides the receiver functions of quantization, signal level detect, and clock and data recover y at OC-48 and OC-48 FEC rates. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for -40C to +85C ambient temperature, unless other wise noted. The device is intended for WDM system applications and can be used with either an external reference clock or an on-chip oscillator with external cr ystal. Both the 2.48 Gb/s and 2.66 Gb/s digital wrapper rates are supported by the ADN2811, without any change of reference clock. This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, low power, fiber optic receiver.

Click here to download ADN2811ACPZ-CML Datasheet
Click here to download ADN2811ACPZ-CML Datasheet
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