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Description:0.3-7V; 200MHz clock generator PLL. For clock generation, low frequency PLLs, low filter clock source, clock smooting, frequency translation, SONET, ATM, ADM, DSLAM, SDM
Manufacturer:Analog Devices
Oper. temp.:-40 to 85
Datasheet:PDF (190K).
Click here to download *)

The ADF4001 clock generator can be used to implement clock sources for PLLs that require very low noise, stable reference signals. It consists of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, and a programmable 13-bit N counter. In addition, the 14-bit reference counter (R Counter) allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator) or VCXO (Voltage Controlled Crystal Oscillator). The N min value of 1 allows flexibility in clock generation.

Click here to download ADF4001BRU Datasheet
Click here to download ADF4001BRU Datasheet
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