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Description:1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs
Manufacturer:Analog Devices
Datasheet:PDF (592K).
Click here to download *)

The AD9510 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. The PLL section consists of a programmable reference divider (R); a low noise phase frequency detector (PFD); a precision charge pump (CP); and a programmable feedback divider (N). By connecting an external VCXO or VCO to the CLK2/CLK2B pins, frequencies up to 1.6 GHz may be synchronized to the input reference.

Click here to download AD9510 Datasheet
Click here to download AD9510 Datasheet
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