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Partname:AD8304ARUZ-RL7
Description:160 dB Logarithmic Amplifier with Photo-Diode Interface
Manufacturer:Analog Devices
Pins:14
Datasheet:PDF (573K).
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The AD8304 is a monolithic logarithmic detector optimized for the measurement of low frequency signal power in fiber optic systems. It uses an advanced translinear technique to provide an exceptionally large dynamic range in a versatile and easily used form. Its wide measurement range and accuracy are achieved using proprietary design techniques and precise laser trimming. In most applications only a single positive supply, VP, of 5 V will be required, but 3.0 V to 5.5 V can be used, and certain applications benefit from the added use of a negative supply, VN. When using low supply voltages, the log slope is readily altered to fit the available span. The low quiescent current and chip disable features facilitate use in battery-operated applications. The input current, IPD , flows in the collector of an optimally scaled NPN transistor, connected in a feedback path around a low offset JFET amplifier. The current-summing input node operates at a constant voltage, independent of current, with a default value of 0.5 V; this may be adjusted over a wide range, including ground or below, using an optional negative supply. An adaptive biasing scheme is provided for reducing the dark current at very low light input levels. The voltage at Pin VPDB applies approximately 0.1 V across the diode for IPD = 100 pA, rising linearly with current to 2.0 V of net bias at IPD = 10 mA. The input pin INPT is flanked by the guard pins VSUM that track the voltage at the summing node to minimize leakage.

Click here to download AD8304ARUZ-RL7 Datasheet
Click here to download AD8304ARUZ-RL7 Datasheet
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