The AD7721 is a complete low power, 12-/16-bit, sigma-delta ADC. The part operates from a +5 V supply and accepts a differential input of 0 V to 2.5 V or 1.25 V. The analog input is continuously sampled by an analog modulator at twice the clock frequency eliminating the need for external sample-andhold circuitry. The modulator output is processed by two finite impulse response (FIR) digital filters in series. The on-chip filtering reduces the external antialias requirements to first order in most cases. Settling time for a step input is 97.07 s while the group delay for the filter is 48.53 s when the master clock equals 15 MHz.