The conversion process is a proprietary algorithmic successive-approximation technique which results in no pipeline delays. The input signal is sampled and a conversion is initiated on the falling edge of the CONVST signal. The conversion process is controlled via an internally trimmed oscillator. Interfacing is via standard parallel signal lines making the part directly compatible with microcontrollers and DSPs. The AD7484 provides excellent ac and dc performance specifications. Factory trimming ensures high dc accuracy resulting in very low INL, offset and gain errors. The part uses advanced design techniques to achieve very low power dissipation at high throughput rates. Power consumption in normal mode of operation is 90mW. There are two power-saving modes: a NAP mode, which keeps the reference circuitry alive for a quick power up while consuming 5mW and a STANDBY mode which reduces power consumption to a mere 5W.