The conversion process and data acquisition are controlled using standard control inputs, allowing easy interfacing to microprocessors or DSPs. The input signal is sampled on the falling edge of CONVST, and conversion is also initiated at this point. BUSY goes high at the start of conversion and goes low 531.66 ns after falling edge of CONVST (AD7472 with a clock frequency of 26 MHz) to indicate that the conversion is complete. There are no pipeline delays associated with the parts. The conversion result is accessed via standard CS and RD signals over a high speed parallel interface. The AD7470/AD7472 use advanced design techniques to achieve very low power dissipation at high throughput rates. With 3 V supplies and 1.5 MSPS throughput rates, the AD7470 typically consumes, on average, just 1.1 mA. With 5 V supplies and 1.75 MSPS, the average current consumption is typically 1.6 mA. The part also offers flexible power/throughput rate management. Operating the AD7470 with 3 V supplies and 500 kSPS throughput reduces the current consumption to 713 A. At 5 V supplies and 500 kSPS, the part consumes 944 A.