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CD74HC112 series datasheets. Manufacturer: Texas Instruments.

CD54HC112F3A HIGH SPEED CMOS LOGIC DUAL J-K FLIP-FLOPS WITH SET AND RESET, NEGATIVE-EDGE TRIGGER in 16-pin J package. Operational temperature range from -55°C to 125°C.Datasheet*)
CD54HCT112F3A HIGH SPEED CMOS LOGIC DUAL J-K FLIP-FLOPS WITH SET AND RESET, NEGATIVE-EDGE TRIGGER in 16-pin J package. Operational temperature range from -55°C to 125°C.Datasheet*)
CD74HC112E HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET in 16-pin N package. Operational temperature range from -55°C to 125°C.Datasheet*)
CD74HC112M96 HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET in 16-pin D package. Operational temperature range from -55°C to 125°C.Datasheet*)
CD74HCT112E HIGH SPEED CMOS LOGIC DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET in 16-pin N package. Operational temperature range from -55°C to 125°C.Datasheet*)
CD54HC112Dual J-K Flip-Flop with Set and Reset Negative-Edge TriggerDatasheet*)
CD54HCT112Dual J-K Flip-Flop with Set and Reset Negative-Edge TriggerDatasheet*)
CD74HC112MTDual J-K Flip-Flop with Set and Reset Negative-Edge TriggerDatasheet*)
CD74HC112NSRDual J-K Flip-Flop with Set and Reset Negative-Edge TriggerDatasheet*)
CD74HC112PWDual J-K Flip-Flop with Set and Reset Negative-Edge TriggerDatasheet*)
CD74HC112PWRDual J-K Flip-Flop with Set and Reset Negative-Edge TriggerDatasheet*)
CD74HC112PWTDual J-K Flip-Flop with Set and Reset Negative-Edge TriggerDatasheet*)
CD74HC112Dual J-K Flip-Flop with Set and Reset Negative-Edge TriggerDatasheet*)
CD74HCT112Dual J-K Flip-Flop with Set and Reset Negative-Edge TriggerDatasheet*)
5962-8970201EAHigh Speed CMOS Logic Dual J-K Flip-Flops with Set and Reset, Negative-Edge TriggerDatasheet*)
CD74HC112EE4High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and ResetDatasheet*)
CD74HC112M96E4High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and ResetDatasheet*)
CD74HC112MTE4High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and ResetDatasheet*)
CD74HC112NSRE4High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and ResetDatasheet*)
CD74HC112PWE4High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and ResetDatasheet*)
CD74HC112PWRE4High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and ResetDatasheet*)
CD74HC112PWTE4High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and ResetDatasheet*)
CD74HCT112EE4High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and ResetDatasheet*)
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