74LCX112CW | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Datasheet*) |
74LCX112M | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs in 16-pin SOIC package. | Datasheet*) |
74LCX112MTC | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs in 16-pin TSSOP package. | Datasheet*) |
74LCX112MTCX | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs in 16-pin TSSOP package. | Datasheet*) |
74LCX112MX | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs in 16-pin SOIC package. | Datasheet*) |
74LCX112SJ | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs in 16-pin SOIC package. | Datasheet*) |
74LCX112SJX | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs in 16-pin SOIC package. | Datasheet*) |
74LCX112 | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Datasheet*) |
74LCX112MTCX_NL | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs in 16-pin TSSOP package. | Datasheet*) |