V53C16258HK25 series datasheets. Manufacturer: Mosel Vitelic.

V53C16258HK25 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 25ns in 40-pin SOJ package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HK25I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 25ns in 40-pin SOJ package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HK30 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 30ns in 40-pin SOJ package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HK30I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 30ns in 40-pin SOJ package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HK35 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 35ns in 40-pin SOJ package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HK35I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 35ns in 40-pin SOJ package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HK40 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 40ns in 40-pin SOJ package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HK40I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 40ns in 40-pin SOJ package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HK45 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 45ns in 40-pin SOJ package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HK45I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 45ns in 40-pin SOJ package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HK50 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 50ns in 40-pin SOJ package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HK50I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 50ns in 40-pin SOJ package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HT25 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 25ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HT25I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 25ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HT30 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 30ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HT30I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 30ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HT35 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 35ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HT35I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 35ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HT40 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 40ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HT40I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 40ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HT45 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 45ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HT45I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 45ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258HT50 High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 50ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258HT50I High performance 256K x 16 EDO page mode CMOS DRAM no self refresh, 50ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258SHT25 High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 25ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258SHT25I High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 25ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258SHT30 High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 30ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258SHT30I High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 30ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258SHT35 High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 35ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258SHT35I High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 35ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258SHT40 High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 40ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258SHT40I High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 40ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258SHT45 High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 45ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258SHT45I High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 45ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*) V53C16258SHT50 High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 50ns in 40-pin TSOP II package. Operational temperature range from 0°C to 70°C. Datasheet*) V53C16258SHT50I High performance 256K x 16 EDO page mode CMOS DRAM optional self refresh, 50ns in 40-pin TSOP II package. Operational temperature range from -40°C to 85°C. Datasheet*)

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